-- ****************************************************************
-- * FILENAME:  prienc.vhd                                        *
-- * AUTHOR:    durant@msoe.edu <Dr. Durant>                      *
-- * DATE:      Friday 13 February 2009                           *
-- * PROVIDES:                                                    *
-- *                                                              *
-- * - a 4:2 priority encoder using when else statements          *
-- * - output is "3" when I(3) is on,                             *
-- * -           "2" when I(2) is on but I(3) is off,             *
-- * -           etc.                                             *
-- *                                                              *
-- * THINGS TO EXPLORE IN THIS EXAMPLE                            *
-- * - You can see the design generated by                        *
-- *   the Quartus software after analysis and elaboration.       *
-- *   To do this select Tools:Netlist Viewers:RTL Viewer         *
-- * - If not used carefully, when-else can generate latches      *
-- *   (covered in CE-1910) where you did not intend them.        *
-- *   Be sure to check the RTL view to make sure the design is   *
-- *   not more complex than you intended.                        *
-- ****************************************************************

-- ****************************************************************
-- * ENTITY PIN DECLARATIONS                                      *
-- * none since this is not a top-level entity                    *
-- ****************************************************************

entity PRIENC is port(
	I: in bit_vector(3 downto 0);
	A: out bit_vector(1 downto 0);
	Z: out bit
);
end entity PRIENC;

-- ****************************************************************
-- * ENTITY BLUEPRINT : ARCHITECTURE DESCRIPTION                  *
-- *                                                              *
-- * - This DATAFLOW architecture will blueprint the entity       *
-- *   behavior using logical assignment statements.  when-else   *
-- *   is helpful for A since it allows a briefer format whereby  *
-- *   cases can be written that are tested sequentially,         *
-- *   although the synthesizer may implement them in parallel    *
-- *   for efficiency.  You must be careful with when-else,       *
-- *   though, as it *can* generate inefficient designs, not      *
-- *   reducing to the simple combinational design that is        *
-- *   intended.  Always check the RTL output.  The following     *
-- *   generates efficient RTL in Quartus 8.1.                    *
-- ****************************************************************
architecture DATAFLOW of PRIENC is
begin
	A <= B"11" when I(3) = '1' else
	     B"10" when I(2) = '1' else
	     B"01" when I(1) = '1' else
	     B"00";

	Z <= '0' when I = "0000" else
		 '1';
end architecture DATAFLOW;